Reputation:
toshiba ac100 paz00 la-5952p nvdia(t20) + four x4 ddrii rev 1.0a
Technical Specifications
Technical Summary
This Compal PAZ00 schematic, revision 1.0a dated 2010-07-15, documents a motherboard built around the Nvidia Tegra T20 CPU platform. The system memory architecture consists of four DDR2 SDRAM chips configured as four x4 DDRII. The embedded controller is an ENE KBC KB926, and the audio subsystem is handled by an ALC5632 codec. Power management and charging are managed by a TI TPS658621 charger IC. The board includes an SPI ROM for BIOS/SPI flash storage. Thermal monitoring is provided by an ADI ADT7421 sensor. Connectivity is supported by SMSC USB 2514 and SMSC USB 2512 USB hub ICs, along with an integrated WiFi module. The board also features an SN75LVDS83 LVDS bridge for display output and I2C level shifters for HDMI interface.
Technician FAQ
Q: What EC/KBC is used on this motherboard?
A: The ENE KBC KB926 is used as the embedded controller/keyboard controller.
Q: What is the CPU platform on this motherboard?
A: The CPU platform is the Nvidia Tegra T20.
Q: What memory configuration does this motherboard support?
A: The board supports four DDR2 SDRAM chips in a four x4 DDRII configuration.
Q: What charging IC is used on this motherboard?
A: The charging IC is the TI TPS658621.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
Technical Specifications
| Parameter | Value |
|---|---|
| Brand | Compal |
| Model | PAZ00 |
| Motherboard Manufacturer | Compal Electronics, Inc. |
| Document Number | 332 |
| Revision | 1.0a |
| Date | 2010-07-15 |
| CPU Platform | Nvidia Tegra T20 |
| EC / KBC | ENE KBC KB926 |
| Audio Codec | ALC5632 |
| BIOS / SPI Flash | SPI ROM |
| Charging IC | TI TPS658621 |
| RAM Type | DDR2 SDRAM |
| RAM Architecture | four x4 DDRII |
| RAM Quantity / Slots | 4 |
| Thermal Sensor | ADI ADT7421 |
| Card Reader IC | SN75LVDS83 |
| USB Hub IC | SMSC USB 2514, SMSC USB 2512 |
| WiFi / WLAN IC | WIFI |
| HDMI Level Shifter | I2C LEVEL Shifter |
Technical Summary
This Compal PAZ00 schematic, revision 1.0a dated 2010-07-15, documents a motherboard built around the Nvidia Tegra T20 CPU platform. The system memory architecture consists of four DDR2 SDRAM chips configured as four x4 DDRII. The embedded controller is an ENE KBC KB926, and the audio subsystem is handled by an ALC5632 codec. Power management and charging are managed by a TI TPS658621 charger IC. The board includes an SPI ROM for BIOS/SPI flash storage. Thermal monitoring is provided by an ADI ADT7421 sensor. Connectivity is supported by SMSC USB 2514 and SMSC USB 2512 USB hub ICs, along with an integrated WiFi module. The board also features an SN75LVDS83 LVDS bridge for display output and I2C level shifters for HDMI interface.
Technician FAQ
Q: What EC/KBC is used on this motherboard?
A: The ENE KBC KB926 is used as the embedded controller/keyboard controller.
Q: What is the CPU platform on this motherboard?
A: The CPU platform is the Nvidia Tegra T20.
Q: What memory configuration does this motherboard support?
A: The board supports four DDR2 SDRAM chips in a four x4 DDRII configuration.
Q: What charging IC is used on this motherboard?
A: The charging IC is the TI TPS658621.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
Indexed motherboard components
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Indexed motherboard components
Open a component to see every indexed schematic that uses the same part.
Attachments
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