hp envy sleekbook 6 qau30-compal la-8661p_rev0.1 schematic
hp envy sleekbook 6=1=qau30-compal la-8661p_rev0.1.pdf
Technical Specifications
Technical Summary
This Compal Lotus LA-8551P revision 0.1 motherboard schematic, dated 2011/10/27, details an Intel Ivy Bridge ULV processor platform paired with the Panther Point PCH. The system memory architecture consists of dual-channel DDR3-SO-DIMM across two slots, supporting DDR3 1333/1600MHz and DDR3L 1333MHz. Graphics processing is handled by an AMD Thames-XT GPU with 128-bit memory interface and eight DDRIII VRAM chips. The embedded controller is an ENE KB932 with a dedicated 256kB EC ROM. The BIOS SPI flash is configured as 4MB plus 2MB. Audio is managed by an IDT 92HD91 HDA codec, while the integrated LAN and card reader functions are provided by a Realtek RTL8411 controller. The charging circuit is identified as HP3DC2, and a TPM module SLB9635/9656 is present.
Technician FAQ
Q: What EC/KBC is used on this motherboard?
A: The embedded controller is an ENE KB932 with a dedicated 256kB EC ROM.
Q: What is the BIOS SPI flash configuration?
A: The BIOS SPI ROM is configured as 4MB plus 2MB.
Q: What is the GPU configuration?
A: The GPU is an AMD Thames-XT with 128-bit memory interface and eight DDRIII VRAM chips.
Q: What is the memory architecture?
A: The motherboard supports dual-channel DDR3-SO-DIMM across two slots, supporting DDR3 1333/1600MHz and DDR3L 1333MHz.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
hp envy sleekbook 6=1=qau30-compal la-8661p_rev0.1.pdf
Technical Specifications
| Parameter | Value |
|---|---|
| Brand | Compal |
| Model | Lotus |
| Motherboard Manufacturer | Compal Electronics, Inc. |
| Project Code | Lotus |
| Board Number | LA-8551P |
| Revision | 0.1 |
| Date | 2011/10/27 |
| CPU Platform | Intel Ivy Bridge ULV Processor with DDRIII + Panther Point |
| EC / KBC | ENE KB932 |
| EC Flash / ROM | 256kB |
| Audio Codec | IDT 92HD91 |
| BIOS / SPI Flash | BIOS SPI ROM, 4MB + 2MB |
| Charging IC | HP3DC2 |
| RAM Type | DDR3-SO-DIMM |
| RAM Architecture | Dual Channel |
| RAM Quantity / Slots | 2 |
| Card Reader IC | RTL8411 |
| LAN IC | RTL8411 |
| WiFi / WLAN IC | WLAN&BT (mini card) |
| GPU Type | AMD Thames-XT |
| Graphics Architecture | 128Bit 128Mx16 VRAM x8pcs DDRIII |
| PCH / Southbridge | Panther Point |
| TPM | SLB9635/9656 |
Technical Summary
This Compal Lotus LA-8551P revision 0.1 motherboard schematic, dated 2011/10/27, details an Intel Ivy Bridge ULV processor platform paired with the Panther Point PCH. The system memory architecture consists of dual-channel DDR3-SO-DIMM across two slots, supporting DDR3 1333/1600MHz and DDR3L 1333MHz. Graphics processing is handled by an AMD Thames-XT GPU with 128-bit memory interface and eight DDRIII VRAM chips. The embedded controller is an ENE KB932 with a dedicated 256kB EC ROM. The BIOS SPI flash is configured as 4MB plus 2MB. Audio is managed by an IDT 92HD91 HDA codec, while the integrated LAN and card reader functions are provided by a Realtek RTL8411 controller. The charging circuit is identified as HP3DC2, and a TPM module SLB9635/9656 is present.
Technician FAQ
Q: What EC/KBC is used on this motherboard?
A: The embedded controller is an ENE KB932 with a dedicated 256kB EC ROM.
Q: What is the BIOS SPI flash configuration?
A: The BIOS SPI ROM is configured as 4MB plus 2MB.
Q: What is the GPU configuration?
A: The GPU is an AMD Thames-XT with 128-bit memory interface and eight DDRIII VRAM chips.
Q: What is the memory architecture?
A: The motherboard supports dual-channel DDR3-SO-DIMM across two slots, supporting DDR3 1333/1600MHz and DDR3L 1333MHz.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
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