Reputation:
Acer Swift 3 SF316-51 LA-L151P Schematic
Technical Specifications
Technical Summary
This Compal LA-L151P motherboard schematic, revision 1A dated January 14, 2021, is designed for the Intel Tiger Lake UP3 platform with an integrated GPU. The board utilizes a Tiger Lake PCH-LP southbridge and features dual-channel on-board LPDDR4X memory operating at 4266 MT/s in an interleaved configuration. The embedded controller is an ENE KB9052, and the audio subsystem is handled by an ALC255 HDA codec. The BIOS is stored on a 128Mb SPI ROM. For display connectivity, an HDMI repeater, the PS8409, is employed. The system also includes a Thunderbolt Type-C connector and supports CNVi for wireless connectivity.
Technician FAQ
Q: What is the EC/KBC used on this motherboard?
A: The embedded controller is an ENE KB9052.
Q: What is the BIOS flash capacity on this motherboard?
A: The BIOS is stored on a 128Mb SPI ROM.
Q: What type of memory does this motherboard use?
A: The board uses dual-channel, on-board, interleaved LPDDR4X memory.
Q: What is the HDMI level shifter or repeater used on this board?
A: The HDMI repeater is a PS8409.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
Technical Specifications
| Parameter | Value |
|---|---|
| Brand | Compal |
| Model | LA-L151P |
| Motherboard Manufacturer | Compal Electronics, Inc. |
| Project Code | LA-K281P |
| Board Number | LA-L151P |
| Revision | 1A |
| Date | 2021.01.14 |
| Document Number | LA-L151P |
| CPU Platform | Intel Tiger Lake UP3 |
| PCH / Southbridge | Tiger Lake PCH-LP |
| GPU Type | Integrated (Tiger Lake) |
| EC / KBC | ENE KB9052 |
| Audio Codec | ALC255 |
| BIOS / SPI Flash | SPI ROM 128Mb |
| BIOS Flash Capacity | 128Mb |
| RAM Type | LPDDR4X |
| RAM Architecture | Dual Channel, On-board, Interleaved |
| RAM Quantity / Slots | On-board |
| HDMI Level Shifter | PS8409 |
Technical Summary
This Compal LA-L151P motherboard schematic, revision 1A dated January 14, 2021, is designed for the Intel Tiger Lake UP3 platform with an integrated GPU. The board utilizes a Tiger Lake PCH-LP southbridge and features dual-channel on-board LPDDR4X memory operating at 4266 MT/s in an interleaved configuration. The embedded controller is an ENE KB9052, and the audio subsystem is handled by an ALC255 HDA codec. The BIOS is stored on a 128Mb SPI ROM. For display connectivity, an HDMI repeater, the PS8409, is employed. The system also includes a Thunderbolt Type-C connector and supports CNVi for wireless connectivity.
Technician FAQ
Q: What is the EC/KBC used on this motherboard?
A: The embedded controller is an ENE KB9052.
Q: What is the BIOS flash capacity on this motherboard?
A: The BIOS is stored on a 128Mb SPI ROM.
Q: What type of memory does this motherboard use?
A: The board uses dual-channel, on-board, interleaved LPDDR4X memory.
Q: What is the HDMI level shifter or repeater used on this board?
A: The HDMI repeater is a PS8409.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
Indexed motherboard components
Open a component to see every indexed schematic that uses the same part.
Indexed motherboard components
Open a component to see every indexed schematic that uses the same part.
Attachments
Last edited by a moderator: